| This book addresses the problem of hardware synthesis from an initial, infinite
precision, specification of a digital signal processing (DSP) algorithm.
DSP algorithm development is often initially performed without regard to finite
precision effects, whereas in digital systems values must be represented to
a finite precision [Mit98]. Finite precision representations can lead to undesirable
effects such as overflow errors and quantization errors (due to roundoff or
truncation). This book describes methods to automate the translation from an
infinite precision specification, together with bounds on acceptable errors, to
a structural description which may be directly implemented in hardware. By
automating this step, raise the level of abstraction at which a DSP algorithm
can be specified for hardware synthesis.
We shall argue that, often, the most efficient hardware implementation of
an algorithm is one in which a wide variety of finite precision representations
of different sizes are used for different internal variables. The size of the representation
of a finite precision ‘word’ is referred to as its word-length. Implementations
utilizing several different word-lengths are referred to as ‘multiple
word-length’ implementations and are discussed in detail in this book.
The accuracy observable at the outputs of a DSP system is a function of
the word-lengths used to represent all intermediate variables in the algorithm.
However, accuracy is less sensitive to some variables than to others, as is
implementation area. It is demonstrated in this book that by considering error
and area information in a structured way using analytical and semi-analytical
noise models, it is possible to achieve highly efficient DSP implementations. |
