Many of the features in this third edition remain the same as those of the previous editions except for rearrangement of the material or changes in emphasis due to changes in the technology. Combinational circuits are covered in one chapter instead of two, as in the previous edition. The sequential circuit chapter emphasizes design with D flip-flops instead of JK and SR flip-flops. The material on memory and programmable logic are combined in one chapter. Chapter 8 has been revised to include register transfer level (RTL) design procedures.

The main revision in the third edition is the inclusion of sections on Verilog Hardware Description Language (HDL). The HDL material is inserted in separate sections so it can be covered or skipped as desired. The presentation is at a suitable level for beginning students that are learning digital circuits and a hardware description language at the same time.

• Digital circuits are introduced in Chapters 1 through 3 with an introduction to Verilog HDL in Section 3-9.
• Further discussion of HDL occurs in Section 4-11 following the study of combinational circuits.
• Sequential circuits are covered in Chapters 5 and 6 with corresponding HDL examples in Sections 5-5 and 6-6.
• The HDL description of memory is presented in Section 7-2.
• The RTL symbols used in Verilog HDL are introduced in Sections 8-2.
• Examples of HDL descriptions in the RTL and structural levels are provided in Section# 8-5 and 8-8.
• Section 10-10 covers switch-level modeling corresponding to CMOS circuits.
• Section 11-19 supplements the hardware experiments of Chapter 11 with HDL experiments. Now the circuits designed in the laboratory can be checked by means of hardware components and/or by HDL simulation.

The CD-ROM in the back of the book contains the Verilog HDL source code files for the examples in the book and two simulators provided by SynaptiCAD. The first simulator is VeriLogger Pro, a traditional Verilog simulator that can be used to simulate the HDL examples in the book and to verify the solutions of HDL problems. The second is a new type of simulation technology, called an Interactive Simulator. This simulator allows engineers to simulate and analyze design ideas before a complete simulation model or schematic is available. This technology is particularly useful for students, because they can quickly enter Boolean and D flip-flop or latch input equations to check equivalency or to experiment with flip-flops and latch designs. Tutorials are available as HTML files in the CD-ROM Flash display and as MS Word files in the SynaptiCAD installed directory under Book Tutorials.