Professional Verification is a guide to advanced functional verification in the nanometer era. It presents the best practices in functional verification used today and provides insights on how to solve the problems that verification teams face. Professional Verification is based on the experiences of advanced verification teams throughout the industry, along with work done at Cadence Design Systems.
Professional Verification presents a complete and detailed Unified Verification Methodology based on the best practices in use today. It also addresses topics important to those doing advanced functional verification, such as assertions, functional coverage, formal verification, and reactive testbenches.
After years of doing what I considered grunt work in test, tool development,
and verification, I finally got my chance to design a major portion of an
important chip. I had created a detailed specification and beat all the scheduled
milestones. My design was meeting its performance goals with time to
spare, and the initial layout looked great. And then, two weeks before tapeout
of the entire chip, the bug reports began to come in. The random verification
regressions had been running fine for weeks until some of the parameters
were loosened. Suddenly, my block was losing or misordering transactions,
and all the simulations were failing. I found what I thought was a one-in-amillion
corner case bug, but the next day the simulations were failing again.
Another fix and another fix and still the bugs kept popping up. I was called in
by the project managers. The tapeout deadline was at risk of slipping and it
was because of me.